Computer System Architecture Set 19

Questions 181 to 190



181.
The computer architecture having stored program is _____.
(a)  Harvard                                                          (b)  Von-Neumann      (c)  Pascal
(d)  Ada                                                                  (e)  Cobol.
182.
The key technology used in IV generation computers is _______.
(a)  MSI                                                                  (b)  SSI                                   (c)  LSI &VLSI
(d)  Transistors                                                      (e)  Vacuum Tubes.
183.
x and y are two digit BCD numbers. It is known that x + y is equal to 82(BCD) and x - y is equal to 04(BCD). The value of x is _______.
(a)  01000011                      (b)  00001010                      (c)  00101011                       (d)  00100111      (e)  00110010.
184.
The gray code of a given binary number 1001 is
(a)  1110                        (b)  0110                        (c)  1101                        (d)  1111                        (e)  0000.
185.
When the addition of two +ve numbers results in a –ve value, then _______ flag will be set.
(a)  Over-flow               (b)  Carry                       (c)  Parity                       (d)  E                               (e)  Sign.
186.
The digital circuit that generates the arithmetic sum of two binary numbers of any length is ________ .
(a)  Binary-Adder         (b)  Full-Adder              (c)  Half-Adder             (d)  Adder                      (e)  OR-gate.
187.
Which of the following representation requires the least number of bits to store the number +255?
(a)  BCD                                                                 (b)  2’s complement                     (c)  1’s complement
(d)  Unsigned binary    (e)  Signed binary.
188.
The number of select input lines in an 8-to-1 multiplexer is ________.
(a)  1                               (b)  8                               (c)  2                               (d)  4                               (e)  3.
189.
If F= AB’ + C’D then F’= _______.
(a)  (A+B’)(C’+D)                                                 (b)  (A’B)+(CD’)                                                   (c)  (AB’)(CD’)
(d)  (A’+B)(C+D’)         (e)  (A’+B)+(C+D’).
190.
Serial to parallel data conversion is done using
(a)  Accumulator                                                  (b)  Shift Register                                                  (c)  Counter
(d)  CPU                                                                 (e)  Control Unit.


Answers



181.
Answer :   (b)
Reason :            The first computer architecture having stored program is Von-Neumann
182.
Answer :   (c)
Reason :            Large-scale integrated and very large-scale integrated circuits are used  in the IV generation.
183.
Answer :   (a)
Reason :            The x value is 01000011   
184.
Answer :   (c)
Reason :            The gray code of 1001 is 1101
185.
Answer :   (a)
Reason :            Over –flow flag will be set .
186.
Answer :   (a)
Reason :            The binary adder is used to add binary numbers of any length
187.
Answer :   (d)
Reason :            Unsigned binary representation occupies less space to store the number +255.
188.
Answer :   (e)
Reason :            If 2n data inputs lines are connected to a MUX then there will be n Selection lines.
                 For  8-to -1 MUX 23 input lines and 3 selection lines are possible
189.
Answer :   (d)
Reason :            The complement of AB’ +C’D is ( A’+B ) ( C+D’ )
190.
Answer :   (b)
Reason :            Shift registers are used for serial to parallel data. Conversion.

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